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Broadcom’s high-integration Wi-Fi 8 & NPU-accelerated 50G PON gateway SoCs aim to build a cohesive, 50 Gbps broadband access ecosystem for the AI-infused home.
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The 64-MHz Cortex-M0+ part includes single-shunt FOC support, dual rail-to-rail op amps, and four programmable comparators in packages as small as QFN20.
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The new NFC wireless charging chipset uses 13.56-MHz technology and an MCU-free architecture to simplify wireless power integration in ultra-compact wearable devices, such as smart rings.
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The LM386: How National Semiconductor Put a Speaker Amplifier in Eight Pins
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The new motor control device simplifies high-efficiency brushless DC systems by combining a 32-bit processor with a specialized hardware vector engine.
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Microchip’s new digital signal controllers integrate high-resolution control, high-speed analog, and post-quantum cryptography.
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The new ESP32-S31 combines high-performance dual-core processing with multi-protocol wireless support.
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How Two Motorola Transistors Became the World’s Default NPNs
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At APEC 2026, Power Integrations introduced its TopSwitchGaN 440 W, which unites PowiGaN switches with traditional TOPSwitch architecture, simplifying high-power designs.
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The automotive-qualified system-in-package brings MPU power to a more accessible MCU-type development environment.
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