Microchip recently introduced their latest PCIe 6.0/CXL 3.1 compatible retimer chip; the PM8691 XpressConnect RTM-C 16xG6. The chip extends signal reach past the limits of PCIe 5 and 6 in AI data centers and installations with large CPU and GPU clusters. It compensates for delay, skew, jitter, and other degradations that occur due to the distance, connectors, and varying signal pathways in high performance computing environments.
The PCIe 6.0/CXL 3.1 Signal Challenges
Datacenters, especially AI installations, depend on highly parallel processors and clusters of processors. Maximum performance is not just dependent on raw processing power. Signal reach and risetime latency can become a significant limiting factor in parallel rack systems.
PM8691 XpressConnect RTM-C 16xG6 is a PCIe 6.0/CXL 3.1 compatible retimer chip.
Timing in the world of high-speed data transfer is far more complex than adding a crystal-controlled oscillator or two or three. Version 6.0 of the peripheral component interconnect express (PCIe) moves data at speeds up to 65 giga transfers per second (64GT/s) per lane with up to 16 lanes in a PCIe bus. PCIe 6.0 utilizes PAM4 (4-level pulse amplitude modulation) providing double the data for the same clock speed.
Transfers may cross from motherboard to riser board to add-in cards and even to and through cables. Signal paths may differ in lengths which results in out of sync signals. This exposes the data to multiple clock domains, long traces, potential capacitive distortion and inductive mismatch. That’s a long way of stating that the signal integrity environment is challenging.
Retimer Functionality
Without retimer compensation, signal degradation and edge mismatch will result in reduced speed or data errors. Microchip’s new XpressConnect family of retimer chips is designed to restore signal integrity, reduce latency, and improve connectivity across dense processor clusters. A retimer compensates for delays induced by signal travel time, removes jitter, recenters the data eye, and buffers the signal amplitude.
Typical applications for the new Microchip Retimer along with other Microchip datacenter support components (in blue)
The retimer is an increasingly necessary component within enterprise servers. It improves operation within nonvolatile memory express (NVMe) PCIe enclosures and Flash arrays, CXL memory sections, and PCIe fabrics. More information is available in the PM8691 Fact Sheet.
Key Features
The PM8691 retimer sits between a data source and a data receiver and reprocesses the signal so the data path can be longer or cross connector boundaries without losing quality and with minimal delay. It is a combination buffer, synchronizer and reconditioner.
XpressConnect retimers deliver pin-to-pin latency of less than 12 ns. That’s 80% less than allowed in PCIe 6.0 specifications. The improved latency allows better coordination within large processor clusters by reducing wait times and error compensation processing.
The PM8691 supports PCIe 6.0 and CXL 3.1. It is backward compatible with PCIe Express 3.0, 4.0, and 5.0, and CXL 3.0. Broad compatibility comes through its support of x4/x8/x16 bifurcation, has auto-detection of pseudo port orientation, and lane reversal and lane polarity inversion. The chip has built-in bypass capacitors to simplify PCB routing and reduce design parts count.
The Microchip PCIe 6.0/CXL 3.1 Family
The new retimer chip is only part of the Microchip server support family. In addition to retimer chips, Microchip supports datacenters with switches, RAID controllers, host bus adapters (HBAs), and NVMe controllers. The PM8691 also connects to the Microchip ChipLink diagnostic system. ChipLink has a graphic interface that displays real-time imagery including 2D eye diagrams and four-level PAM4 visualization.
Microchip designed the retimer and other datacenter support chips as industry-standard drop-in components. This reduces the need for sole-source dependency in the highly specialized datacenter industry. The components follow standard footprint guidelines and include important capability such as hot-plug support and end-to-end data integrity protection.
All images used courtesy of Microchip.
